CT101 - Computing Systems

Course Sylabus

Computing systems organization overview; Data representation; Introduction to Computing Systems Organization (CPU, Memory, Buses, I/O Devices); Introduction to Operating Systems; Introduction to Data Communications; Introduction to Networking; Introduction to Electronic Circuits; Digital logic fundamentals (CLC and FSM design); Computing systems elements: CPU, Memory Subsystem (Primary and Secondary), I/O Subsystem and Devices;

(2 hours/week, full year)

Course Details

You can download the course details in powerpoint format here.

Course and Labs attendance is mandatory.

Presentations

Semester I

• Overview of computing systems
• Data Representation in Computing Systems.
• Numbering Systems. Positive Numbers Representation. Negative Number Representation. Floating Point Numbers.
• Computing Systems Organization. CPU, Memory, Buses and I/O Devices. Principles of operation.
• Operating systems. History. Function. Organization. Software clasification. Kernel. File manager. Device Manager. Memory Manager. Process Manager. Booting the OS.
• Voltage, electric current, resistance and power. Various electronic components. FET transistor design and priciple of operation. Use of FETs in logic circuits. Digital Logic Gates.
• Review CLC Design. Boolean Algebra. Fundamental Logic Gates. DeMorgan Law. Karnaugh Maps. Other Combinatorial Circuitry. CLC Design.
• Basic Sequential Components. Latches. Flip-Flops. Registers. Counters. Programable devices.

Semester II

• Finite State Machine Model. Synchronous Finite State Machines. Mealy and Moore Finite State Machines. Finite State Machine Design & Implementation Methods. Dealing with Unused States. Design Examples.
• Hardware Description Languages. Simulation. Synthesis. Combinatorial logic modeling. Sequential logic modeling. Finite State Machine modeling. Testbenches.
• CPU Review. CPU Organization. CPU Programming Models.
• CPU instruction set architecture and design.
• CPU Design & Implementation. Pipeline & revised CPU Design and Implementation.
• CPU Pipeline Hazard. Structural, data and control hazards. Procesor redesign for performance.
• Memory Sub-System. Memory Hierarchy. Memory Types. Internal and System Oranization. Caching.
• I/O Sub-System. I/O Modules & Peripherals. Adressing & Data transfers. Programed, interrupt and DMA based I/O.

Additional Material

• Introduction to Data Communications and Networking.Simplex, half duplex and duplex channels. Parallel and serial. Synchronous and asynchronous. Modulation and modems. Networking topologies, cables and architectures. OSI Model
• Introduction to Internet. Architecture. Protocols. Addressing and DNS. Applications.E-Mail. WWW.